Matt Hsu

Senior Design Verification Engineer at Cerebras Systems

San Jose, California, United States

About

Provide ASIC Verification Services Including: * Verification Architecture (design and evolution) * Verification Environment (design and evolution) * Synthesizable Testbench Environments * Test Plan Generation * Testbench Development * Test Writing * Simulation Model Development * Simulation and Analysis * FPGA Prototype Development * Verification Process Analysis * Verification Tool Development * Verification Team Development * Verification Team Training Specialties: SystemVeilog, SystemVerilog Assertions, Verilog, Verilog-PLI, VHDL, Vera, OVM - C/C++, Perl, Perl-CGI, Perl-Gtk2, TCL, Java, HTML - Synopsys VCS, Synopsys Magellan, Cadence ncverilog, Mentor ModelSim, Jasper, Certess

Experience

  • Senior Design Verification Engineer at Cerebras Systems
    May 2017 - Present · 9 yrs 3 mos

  • President at Verification Enterprises, LLC
    Jul 2014 - Present · 12 yrs 1 mo

  • ASIC Verification Specialist at Matthew A. Hsu Consulting
    Jun 2002 - Present · 24 yrs 2 mos

  • ASIC Verification Specialist at Microsoft
    Oct 2015 - Feb 2017 · 1 yr 5 mos

    Hololens ASIC verification.

  • Software Validation Engineer at Bay Storage Technology, Inc.
    Nov 2014 - Sep 2015 · 11 mos

    Validation of storage management software.