Taipei, Taipei City, Taiwan
● Expertise in SoC performance modeling, architecture exploration and validation. ● Proficiency in architecture design of AI accelerator, SoC QoS/memory system, as well as data center networking switch. ● Proven leadership in planning/managing tasks/project, classify, analyze and resolve critical issues, and growing a team quickly to work efficiently. ● Mastery of chip design, integration, verification, FPGA and familiar with digital design flow.
(IC/TL/Manager) SoC architecture modeling, exploration and validation for QoS/memory system
System performance modeling RISC-V processor design and verification
Architecture performance modeling
Lead ASIC team in digital design and front-end flow enhancement. Issue tracking and sharing to upgrade team ability in design/Lint/DC/Mbist /UPF/Formality.
Lead WiFi-AP SoC from architecture, micro-architecture, RTL design, verification, FPGA emulation to tape-out
Data path modeling and architecture exploration for data center network switch
ASIC design and verification