San Francisco Bay Area
Lead segment strategy, business health, and growth for two of Altera's emerging markets: LLM inference in the data center and satellite communications. Own the commercial thesis across both segments, shaping silicon and IP roadmap investment, building the partner ecosystem, and developing executive-level customer relationships that convert market opportunity into design wins and long-range revenue.
Network Business Division, Wireless Business Unit. Responsible for Fronthaul Gateway and vRAN business. Timing Specialization - defined Intel PTP Servo GTM strategy. Authored papers on mMIMO, PTP 1588, OpenRAN Radios, Chiplet Transceiver Networking. 2x Intel FPGA Day Conference Speaker. Managed BUs top opportunities and yearly Long Range Plan (LRP).
Intel’s PSG rotational program is a development program. Within the rotation program Emerging Professionals (EPs) have the opportunity to rotate throughout PSG’s organizations. 1st Rotation: Product Marketing under Chief of Staff for initiative Workload 360; led multidisciplinary team in defining a winning 5G radio sales strategy through field research, benchmarking, playbook creation, and an external whitepaper. 2nd Rotation: Military Systems Solution Engineer; contributed to development, testing, and user guide for demo designs showcasing IP in customer use cases. Designs in MATLAB and Quartus. 3rd Rotation: Technical Strategic Business Development: A research effort to better understand FPGAs applicability in cloud-based acceleration deployments. Built a front-end interface to host disaggregated Kubernetes containers run on FPGA accelerator nodes (AI/ML, Compression, Storage, Memory). Design in Python and JavaScript
NSG Data Center Optane Division; Automated performance (Bandwidth/IOPS) benchmark and analysis for symmetric and asymmetric workloads on next gen Optane dual port SSD. Programming in Python and Bash. Contributed to Power, Performance, and Temperature Team’s git repository. Worked with System Engineering teams to provide automated test case gap coverage. Completed numerous trainings and certifications.
Worked one on one along side Linda Irish, Senior Principle Hardware Engineer, in designing/programming a Power Amplifier Test Board and Power Monitor Board. Simulations in LTSpice. Schematic/Board Layout in KiCAD. Consisted of 84 unique components ranging from an ADC, DAC, MCU, BLE. Contributed to newest product’s DVT testing.
Delivered orders on demand in Bay Area. Worked as an independent contractor practicing customer and vendor relations.