Bob Schultz

Cutting-edge ASIC and FPGA Design

Palo Alto, California, United States

About

Over 20 years of electrical engineering experience ranging from people/project management to ASIC, FPGA, PCB, and system design with a proven track record of product delivery.

Experience

  • Principal Engineer at Cerebras Systems
    Jun 2018 - Present · 8 yrs 2 mos

    Wafer-scale ASIC and FPGA Development for Machine Learning

  • Senior Design Engineer at Apple
    Jul 2015 - Jun 2018 · 3 yrs

    ASIC and FPGA development for cool products coming soon to an Apple store near you!

  • Principal Engineer / Senior ASIC Design Manager at Alcatel-Lucent
    May 2006 - Jul 2015 · 9 yrs 3 mos

    Management, architecture, and design of complex ASIC and SOC FPGAs for networking (Ethernet, TCP/IP, HTML), and non-volatile storage (flash, NVMe, PCIe).

  • Principal Engineer at Riverstone Networks / Cabletron / Yago Systems
    Mar 1997 - May 2006 · 9 yrs 3 mos

    Management, architecture, and design of complex ASICs, FPGAs, and boards. [Yago was acquired by Cabletron and IPO'd as Riverstone Networks, then bought by Alcatel-Lucent.]

  • Senior Design Engineer at Intel Corporation
    Mar 1995 - Mar 1997 · 2 yrs 1 mo

    Verification and System Integration on Itanium Processor (P7).