Bastien Cricchi

๐‘ญ๐’–๐’๐’„๐’•๐’Š๐’๐’๐’‚๐’ ๐‘ฝ๐’‚๐’๐’Š๐’…๐’‚๐’•๐’Š๐’๐’ ๐‘ฌ๐’๐’ˆ๐’Š๐’๐’†๐’†๐’“, NXP Semiconductors | ๐™‹๐™ฎ๐™ฉ๐™๐™ค๐™ฃ

Biot, Provence-Alpes-Cรดte d'Azur, France

About

Validation expert of NPU and MPU subsystems, with strong technical foundations in Python (14+ years), bare-metal APIs and reusable frameworks. Metrics-driven team lead, passionate about process optimization to drive cross-functional teams to deliver high quality results.

Experience

  • Validation Engineer at NXP Semiconductors
    Oct 2021 - Present ยท 4 yrs 9 mos

    ๐—Ÿ๐—ฒ๐—ฎ๐—ฑ ๐—ผ๐—ณ ๐—ฒ๐—œ๐—ค ๐—ก๐—ฒ๐˜‚๐˜๐—ฟ๐—ผ๐—ป ๐—ก๐—ฃ๐—จ ๐—ฉ๐—ฎ๐—น๐—ถ๐—ฑ๐—ฎ๐˜๐—ถ๐—ผ๐—ป Validation lead for Neutron NPU across 6 products, driving 3 other engineers for common reporting to dedicated Neutron NPU team ย ย โ€ข Extended validation plan for reuse on other products ย ย โ€ข Delivered generic validation framework, tools and binaries for day to day execution ย ย โ€ข Added generic C bare metal API and per model code generation to the framework, fully reused on other products in multiple SW environments ๐—ถ.๐— ๐—ซ๐Ÿต๐Ÿฑ ๐—ฃ๐—ฟ๐—ผ๐—ฑ๐˜‚๐—ฐ๐˜ ๐—™๐—ฎ๐—บ๐—ถ๐—น๐˜† HW validation of embedded ML accelerator, functionalities, models & operators coverage and performance in a stress context, Pre & Post-Si platforms ย ย โ€ข Custom Framework for generic Model build and conversion, complete interface with eIQ tool suite ย ย โ€ข Performance testing of key KPIs and Framework enablement on Pre-Si (ZEBU) ย ย โ€ข Correlation with SW results and benchmarks ย ย โ€ข Power and Performance analysis, including overclocking ย ย โ€ข CI/CD improvements: automatic commit checkers, JIRA creation upon failing compilation and weekly reminder of assigned JIRA by mail to users ๐—Ÿ๐—ผ๐—ฐ๐—ฎ๐—น ๐˜ƒ๐—ฎ๐—น๐—ถ๐—ฑ๐—ฎ๐˜๐—ถ๐—ผ๐—ป ๐—น๐—ฒ๐—ฎ๐—ฑ FVAL technical lead of 10 people for i.MX943 Campaign, coordinating efforts and debug on 37 IPs, reporting to global lead ย ย โ€ข Validation plans definition including functionalities, performance, stress testing ย ย โ€ข Delivery of reports for important milestones of the campaign ย ย โ€ข Metrics driven non-regression campaign lead ย ย โ€ข Enablement of seamless FVAL environment for Pre & Post-Si for the team ๐— ๐—ฃ๐—จ ๐—™๐—œ๐—ฃ๐—ฆ ๐Ÿญ๐Ÿฐ๐Ÿฌ-๐Ÿฎ / ๐Ÿญ๐Ÿฐ๐Ÿฌ-๐Ÿฏ ๐—ฐ๐—ฒ๐—ฟ๐˜๐—ถ๐—ณ๐—ถ๐—ฐ๐—ฎ๐˜๐—ถ๐—ผ๐—ป ๐—ฝ๐—ฟ๐—ฒ๐—ฝ๐—ฎ๐—ฟ๐—ฎ๐˜๐—ถ๐—ผ๐—ป Developing bare metal scenarios interfacing Security and Cryptography IPs with embedded sensors ย ย โ€ข System violation detection using Security FWs ย ย โ€ข Negative testing (no false positive detected) ย ย โ€ข IR Drop Characterization over Process, Voltage and Temperature

  • Digital Validation at NXP Semiconductors
    Feb 2021 - Aug 2021 ยท 7 mos

    Study of performance, bandwidth and response time as part of Silicon Validation, automation of data collection

  • Post Processing at Probe Level at Silicon Mobility
    Jun 2020 - Sep 2020 ยท 4 mos

    Software development for a python GUI under tkinter to process the tests results of each die of a Wafer and to detect the outliers on the mapping.

  • ร‰quipier de vente secteur Textile at Carrefour
    Jul 2019 - Sep 2019 ยท 3 mos

    Durant ma premiรจre annรฉe de cycle ingรฉnieur j'ai effectuรฉ cet emploi saisonnier au sein du secteur Textile au rayon Linge de maison.