Bengaluru, Karnataka, India
• With the vision to be better everyday in every way, I started my journey from Lucknow, which is my hometown and presently, I am deep-diving into solving VLSI & Silicon engineering problems as part of the PMIC team at Qualcomm. I completed my graduation in B.Tech, ECE from SRMIST, Kattankulathur, Chennai by June 2023. • I am a fervent enthusiast when it comes to exploring the trends of VLSI & Embedded Systems wherein my knack and hunger for VHDL/Verilog coding only grows by day. • With a hobbyist experience in RTL and Digital Logic Design fields of VLSI, I try to capitalise on opportunities with my core skills that I've honed through various internships as well as projects that I did on EDA tools such as Synopsys Custom Compiler, Xilinx ISE, Vivado and Quartus Prime. • Likewise, my course work and portfolio also inculcate Bare-metal microcontroller programming, Computer Architecture, C Programming and Digital Electronics. • I am proactively aiming to volunteer, engage, contribute and evolve to become an active as well as an effective engineer in the VLSI & Embedded Industry. I appreciate you taking out the time for visiting my profile. Please feel free to reach out to me via a LinkedIn message or you can mail me at [email protected]
• Currently working as part of Qualcomm's PM IC team that handles System Architecture and Post-Silicon Design Val. of high-performance Power Management Integrated Circuits (PMICs) for Qualcomm Snapdragon SoCs • Presently, looking into Module-level (IP in Chip), PMIC-architecture and FSM [finite state machine] systems flow that constitute the PMIC-to-SoC (System-on-chip) HW/FW interface • Experience with methodologies for PM IC serial interface protocol, on-board IC-level block diagrams/schematics including timing/power-on estimation, and FPGA/silicon bring-up • Experienced in working with high-speed FPGA-based setup, mixed-signal IPs in PMICs, for Silicon chipset BU and Post Silicon design verification of digital/analog IP modules
• As part of Ather's Product Validation team, handled end-to-end Embedded Firmware Validation for Ather’s charging infrastructure (Grid-2.0 and Grid-2.1) • Developed a Fault Management System [FMS] using 8-bit ATMega2560 and Python achieving over 90% efficacy in time reduction of manual error validation scenarios • Effectively automated more than 45+ testplans to cut-down testing time by over 50% through Python and Shell scripting • Ownership of devising Design Verification plans for Firmware Release builds and regressive validation of Electronics Control unit (ECU) firmware and peripherals inside grid’s hardware architecture • Reported over 100+ bugs on Jira based on firmware version, CAN data decryption and algo verification • Experienced in the use of Linux (Ubuntu OS) with ADB shell to monitor ECU data over CAN protocol • Proficient in working with serial communication protocols viz. UART, CAN
• Proposed and contributed to an open-source EDA project using eSim tool by FOSSEE, IIT-B • Implemented a Serializer/Deserializer (SerDes) mixed signal circuit using Google-Sky130 nm PDK, Verilog and eSim • Tweaked several other open-source software viz. KiCAD, NgSpice, NgVeri and Makerchip IDE to realize the proposed design
• Developed digital logic for FPGA-based prototyping with H-bridge PWM Inverter in wireless charging application • Delivered RTL code for AMD Spartan-6 FPGA and developed VHDL testbench for pre-synthesis timing simulation • Gained deep understanding of FPGA Design flow involving synthesis, implementation and bitsream generation • Demonstrated ability to define User Constraints specific to the FPGA target • Collaborated with Ph.D research scholars and published research work under IEEE
• Executed R&D work for modelling Miniaturized Wheel Dynamics Simulator using MATLAB Simulink-Embedded coder • Performed HIL (Hardware-in-the-loop) testing using 32-bit TMS320F28335 microcontroller and bare-metal MCU Programming involving peripherals viz. PWM, ADCs, I2C in Code Composer Studio • Successfully deployed a test bench device to monitor IAF's Tejas fighter jet wheels velocity and their performance dynamics in real-world setting achieving over 98% accuracy • Demonstrated ability to test and debug embedded hardware using digital oscilloscope (DSO), logic analyzers