Arnaud Regnier

About

Domain of Expertise : Non-Volatile Memory Architecture & Technology Development: from bitcell layout to product qualification, including process flow definition, device architecture & design rules, specifications of test structures electrical characterization and reliability.

Experience

• R&D Technology Development & Electrical Characterization Manager at STMicroelectronics
  Oct 2020 - Present · 5 yrs 9 mos

  Rousset Site Coordinator for Technology & Design Platform Organization Senior Member of Technical Staff

• STMicroelectronics (16 yrs 4 mos)
  • R&D NVM Device Architecture team Manager - Senior Member of Technical Staff
    2018 - 2020 · 2 yrs

  • R&D Process Integration : eNVM Technology Project Leader - Member of Technical Staff
    2015 - 2018 · 3 yrs

    Specific Know How: • Non volatile Memory architecture (including technological survey & competitor benchmark) • Semiconductor and device physics • New device introduction • Test Structure definition • NVM Electrical characterization, parametric test, reliability, failure mode • NVM cell compact modeling • Process/design interface

  • R&D eNVM technology Process Integration Engineer
    2011 - 2015 · 4 yrs