Greater Lyon Area
Technical Specialties: - Analog Design for image sensors, particularly clock management, synchrone analog functions and high speed digital full custom IPs - Signal Integrity - Analog Design applied on serial links Working environment know-how: - knowledge sharing - team working spirit - technical coordination
From September 2016: Analog Design for Imaging Division: * Analog High Speed IPs design (SRAM, Phase Generator) * Clock Management (Synchronization System, DLL design, PLL support and analyses) * EMI RF simulations * Top simulation * Time to Digital Converter: from matlab feasability to schematic design (2 patents) * Read Out support (update and validation) * LDO design 2010 to 2016: MiPhy (PCie/SATA/USB3) Analog Production Test Coordination: * Test Program definition and validation, * Documentation for Final Test Engineering teams, * Final Test development support for SoC embedding MiPhy IPs, SI/PI validation coordinator for SoC embedding MiPhy IPs (PCie/SATA/USB3): * Constraints and Guidelines definition, * From bump to ball (RDL) / package / PCB: SI/PI analyze review versus standards requirements (AC and transient), * PCB modeling and analyze. MiPhy IPs (PCie/SATA/USB3) analog validation and debug support 2005 to 2010 Analog Design Engineer: Design Analog parts of IP applied to serial links (SATA/PCIe/USB3). (high frequency IDLL and DLL, TX parts)
Design Kit Responsible: Planning, Packaging, Validation. (from 130nm to 65nm techno) Customer Support: DK, models, calibre DRC/LVS, cadence, Star RCXT... Particular technical knowledges: * Skill / Pearl * Cadence dfII interface * Layer management * Calibre DRC/LVS * Star RCXT * Models (Crolles)
I belong to the municipal team, "conseiller délégué", in charge of local community life: - support and relationship with local association - sport infrastructure project development - animation of the community life commission - participation to the city council