Écublens, Vaud, Switzerland
ASIC, FPGA, SystemVerilog, UVM, SVA, VHDL, DSP, high-speed interfaces, data systems for space applications, communication protocols (PCIe5, MIL-STD-1553, spacewire, CANbus, RS422, RS232, VMEbus), image processing (sobel filter, median filter, Laplacian of Gaussian), tracking algorithm, embedded software, Silicon Photomultipliers. Specialties: SystemVerilog, VHDL, C, Graphical User Interface design, embedded software
Leading a team of design verification and AMS verification engineers, fostering a culture of open dialog and safe environment to grow technically and personally. Hands-on work on verification strategies, guidelines and testbench architecture, I strive for zero-bug silicon, ensuring quality and reusability, while pushing automation relentlessly. Sharing knowledge and striving for technical excellence, the team is encouraged to explore and share anything that improves our collective speed of execution.
Responsible for the verification of our flagship products PCIe 5 retimer and switch. I had the chance to support a great internal team of skilled and motivated verification engineers through the verification challenges of a highly complex product with state of the art design and home to our endless innovation spree. The merits for our success go to those who've spent countless hours and walked a long journey to root out any critical bug with dedication and resolution.
As system engineer and system architect, my responsibility is to deliver a system which meets system specification, cost and schedule. Daily activities span from requirements management, system level architecture, system verification, test plan and definition
Integration of the Photo Detector Plane for CTA SST camera. System testing, including front end electronics. MPPC characterization.
Ground systems software for Telemetry and Telecommand. Online software for data monitoring and Health and Status. Embedded software for star tracking device (image processing, sobel detector, kalman filter) on floating point DSP.