Aiswarya S T P

About

Hi, I am Aiswarya. I intend to embrace and engage myself with the fast-growing, challenging, yet distinctly sophisticated world of chips and work towards the development and enhancement of integrated instruments.

Experience

• Sr Engineer, R&D at Synopsys Inc
  

• Engineer, R&D at Synopsys Inc
  

• Summer Intern at Tessolve
  

• Project Trainee at Defence Research and Development Organisation (DRDO)
  

  Project: Development of Pixel Interface for ARINC 818 and Validation using Xilinx FPGA

• Technical Intern at Synopsys Inc