San Francisco Bay Area
Engineering and program management leader with a 26-year track record of delivering impactful results. Over the last decade, I played a pivotal role in the inception and expansion of the ML-TPU systems at Google, serving as the lead program manager for the entire portfolio.
Managed IC design team in timing group with a staff of 5 engineers. Design lead and program manager for various products including low cost, low power clock generators for consumer applications as well as high performance, low jitter clock generators/buffers for networking systems. Successfully launched 10+ products. Design responsibilities included supporting product definition, writing specifications, analog/digital design implementation, verification, debugging and silicon validation. Program management responsibilities included managing schedule from product proposal to mass production, leading cross-functional teams, resolving technical issues, managing risks, communicating status and supporting customer.
Led consumer/embedded product lines. Directly managed 4 design engineers. Was responsible for the development of high performance timing products (silicon/hardware/software) with strict time-to-market requirement. Managed cross-functional team and all aspects of product development flow; definition, design, characterization, test, production release, software and customer support. Released more than 30 timing devices into production resulting over 10 million units in shipment to major customers.