Aakash Jagwani

Silicon Validation Engineer @Google|Ex-Synopsys

Bengaluru, Karnataka, India

About

•2+ years of experience in building software for IP evaluation, silicon validation and for customer demonstration in SERDES PHY. • 4 years of experience in Silicon characterization for PCIe gen 1-5 , USB3 , DP and ethernet protocols. • Experience in working in lab setup on test benches for silicon Validation, debug and silicon bringup. • Experience in leading a team size of 2-3 to carry out end to end silicon validation and characterization. • Good experience in handling critical debugs that can gate tape out and a good team player. • Expertise in handling hardware devices like Digital Sampling Scope, Power Analyzer, Signal Generator, VNA etc. and handling of thermal machines for PVT testing. • Running stress regression tests for high speed interface IP like PCIe and ethernet etc. • Programming experience in MATLAB and Python.

Experience

  • Silicon Validation Engineer at Google
    Dec 2025 - Present · 7 mos

  • Synopsys Inc (Full-time · 5 yrs 4 mos)
    • Validation/Verification Eng, Sr Engineer
      Feb 2023 - Dec 2025 · 2 yrs 11 mos

    • Research And Development Engineer
      Sep 2021 - Dec 2025 · 4 yrs 4 mos

    • Trainee Engineer
      Sep 2020 - Sep 2021 · 1 yr 1 mo