Sylvain Baudot

Ph.D., Principal Device Engineer

Leuven, Flemish Region, Belgium

About

Experience

  • R&D Engineer at imec
    Nov 2016 - Present · 9 yrs 8 mos

    FEoL Integration CMOS finfet 7nm

  • Principal Device Engineer at GLOBALFOUNDRIES
    Mar 2013 - Oct 2016 · 3 yrs 8 mos

    Device centering and performance improvement to fulfill customer requirements. CMOS 28nm technology integration in a high volume 300mm foundry. - Leading-edge technology development through device performance analysis and step-up - FEOL & BEOL process changes designed, planned & qualified through PCRB - 8 Products ramped-up and sustained

  • STMicroelectronics (3 yrs 8 mos)
    • Research assistant, Ph. D., Metal gate development for CMOS 28nm technology
      Sep 2009 - Sep 2012 · 3 yrs 1 mo

      Metal Gate process development to enable CMOS 28nm BULK and FDSOI technologies Time shared between ST 300mm Fab and CEA-LETI research center - PVD deposition process and metrology development for 28nm technology (3 patents) - Specific MOS structures designed & run on silicon - MOS Electrical Characterization and IPE testbench setup - 2 papers published in Microelectronic Engineering (vol. 88, 2011) - 4 international conferences

    • Process Engineer Assistant
      Feb 2009 - Aug 2009 · 7 mos

      - Technological watch on metal gate additives and physical mechanism - Follow-up of PVD deposition tool startup & qualification - Metrology calibration (XPS, XRF, Ellipsometry, Rs)

  • Research Assistant at Laboratoire des Colloïdes Verres et Nanomatériaux, CNRS
    Jun 2008 - Aug 2008 · 3 mos

    - Optical profilometer testbench setup. - Measurement of micrometric particles on curved interfaces

  • Research Assistant at Fraunhofer institute IPM
    Jun 2007 - Aug 2007 · 3 mos

    - PVD deposition of nanometric layers for gas sensor applications - Automation of a FTIR spectrometer