Pierre Morin

Scientific Director - MIDA (TF) department

Heverlee, Flemish Region, Belgium

About

Specialties: silicon technology, materials, thin films, annealings, strained silicon, integration, 2D

Experience

  • imec (Full-time · 8 yrs 11 mos)
    • Scientific Director
      Jul 2024 - Present · 2 yrs

      MIDA (TF) R&D department. International R&D academic and industrial projects. Present research: 2D materials, dielectrics and metals for 2D; Thin Films for logic and patterning. Research expériences: strained silicon and the mechanics of small objects, dopant and hydrogen diffusion, thermal stability of materials, thermal budgets and advanced anneal. Technology background: process & materials up to design rules and DTCO, including integration and device, for CMOSFET, Flash and PCM technologies.

    • Team Leader - Advanced Channels (AC)
      May 2021 - Jun 2024 · 3 yrs 2 mos

      Building high-performance thin-film transistors for advanced logic and memory applications require alternative channel material to silicon. We develop and study: -2D semiconductor channels (WS2, MoS2) and the associated HK dielectrics and contact materials to build sub 10nm gate length transistors. -Semiconductor metal oxides (IGZO and derivatives) for ultra-low leakage devices. -Gate and contact metals for advanced Si technology

    • Principal Member Of Technical Staff
      Aug 2017 - Jun 2024 · 6 yrs 11 mos

      MIDA (TF) R&D department. R&D academic and industrial projects. Present research: 2D materials and the surrounding dielectrics and metals.

  • STMicroelectronics (17 yrs 1 mo)
    • Senior Principal Engineer - SMTS
      Jan 2016 - Jul 2017 · 1 yr 7 mos

      Silicon Technology Development group - Two main activities: Development of materials for advanced embedded memories - Implementation and deployment of process integration software in the R&D group (SEMulator3D - Coventor).

    • Principal Engineer - SMTS
      Mar 2012 - Dec 2015 · 3 yrs 10 mos

      IBM Alliance in Albany NY, ST assignee - 10, 7 nm FinFET and UTBB FDSOI technologies: physics of advanced junctions and strained SiGe Fin and SOI channels - material studies and Multiphysics modelling - design of macros and test structures.

    • Senior member of technical staff
      Jan 2007 - Feb 2012 · 5 yrs 2 mos

      Silicon Technology Development group - CMOSFETs and embedded Flash technologies. Development and integration of new processes, material studies for thin films, implantation and annealing, strained silicon, advanced characterisation. PhD students mentoring, management of research collaborative projects with universities and institutions.

  • Research Engineer at IBM
    Feb 2012 - Dec 2015 · 3 yrs 11 mos

    -10nm and 7nm FinFET R7D In charge of the Unit Process test structure bucket for advanced reticles. SiGe Fin, development of Multiphysics models (strained silicon, diffusion, transport...). -10nm FDSOI, In charge of the team developing advanced strained silicon technologies

  • R&D project leader at Philips
    1995 - Jun 2000 · 5 yrs 6 mos

    development engineer in cathode ray tubes for TV Project leader Process: electron optics, high voltage, vacuum