Antibes, Provence-Alpes-Côte d'Azur, France
I'm currently involved in the verification of Arm CPUs on FPGA hardware. In particular, I support the process of designing, maintaining and implementing digital solutions to extract data from Arm CPUs running on FPGAs.
SITAEL wanted me to be part of its digital design team immediately after university. I mostly worked within the Power Processing Unit division and I was involved in the development, design and testing of the control FPGA of the PLATiNO satellite PPU. My key responsabilities: • Digital hardware design to actuate, monitor and protect PLATiNO satellite thrusters and avionics. • Radiation hardening of space designs by implementing Triple Modular Redundancy and EDAC solutions • Provide technical documentation including requirement definition and test procedures for the ECSS project phases. • Taking active part in coupling tests with the other partners of the PLATiNO project, including the debugging of communication protocols and the definition of register interfaces. • Continuous process improvement by Python/C/bash automation scripting and GUIs.
I performed feasibility evaluations and requirement definition for the European Space Agency's CHIME mission, a Copernicus satellite which will carry a unique visible to shortwave infrared spectrometer to provide routine hyperspectral observations for environmental monitoring. In particular, I worked on the control FPGA of the Instrument Power Unit.
In 2021 I started working on the European Space Agency's Spacerider mission, an uncrewed robotic laboratory that can return to Earth with its payloads and land on a runway to be unloaded and refurbished for another flight. I designed many sections of the Spacerider Memory Management Unit Soc, including design and interconnection of cores to manage data from UART payloads and to perform analog telemetry acquisition.